A 6-bit, 1-GHz Flash ADC in 0.35μm CMOS
نویسنده
چکیده
+ Katholieke Universiteit Leuven, Kasteelpark Arenberg 10, B-3001 Heverlee, [email protected] . Abstract The design plan and measurement results of a very high-speed 6 bit CMOS Flash ADC converter are presented. The very high acquisition speed is obtained by improved comparator design. At these high frequencies power-efficient error correction logic is necessary. Measurements show the high conversion speed of the ADC which is above 1GHz in a 0.35 μm fully digital CMOS technology.
منابع مشابه
Reducing the Power Consumption in Flash ADC Using 65nm CMOS Technology
Today, given the extensive use of convertors in industry, reducing the power consumed by these convertors is of great importance. This study presents a new method to reduce consumption power in Flash ADC in 65nm CMOS technology. The simulation results indicate a considerable decrease in power consumption, using the proposed method. The simulations used a frequency of 1 GHZ, resulting in decreas...
متن کاملReducing the Consumption Power in Flash ADC Using 65nm CMOS Technology
This paper presents a new method to reduce consumption power in flash ADC in 65nm CMOS technology. This method indicates a considerable reduction in consumption power, by removing comparators memories. The simulations used a frequency of 1 GHZ, resulting in decreased consumption power by approximately 90% for different processing corners. In addition, in this paper the proposed method was desig...
متن کاملA 5-bit 4.2-GS/s flash ADC in 0.13-μm CMOS
This paper investigates and analyzes the resistive averaging network and interpolation technique to estimate the power consumption of preamplifier arrays in a flash analog-to-digital converter (ADC). By comparing the relative power consumption of various configurations, flash ADC designers can select the most power efficient architecture when the operation speed and resolution of a flash ADC ar...
متن کاملA low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors
A 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35μm CMOS technology. A nonresetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effec...
متن کاملLow Power Flash ADC
In this paper, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1GHz, is implemented in a 1.2 V analog supply voltage. HSpice simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes less power i n a commercial 90n...
متن کامل